This invention generally relates to detection of plasma damage during semiconductor processing.
Process-induced damage is becoming a very serious concern for semiconductor device manufacturers. Such damage accounts for device degradations and lower yields. One type of process-induced damage can occur during ash, plasma etch and plasma enhanced deposition processes (collectively referred to as plasma charging damage), and ion implantation. Charge-induced damage is becoming particularly important due to: the scaling down of gate oxide thicknesses and channel length with succeeding technologies; increasing levels of metalization; and the advent of high density plasma sources for etching and deposition.
With respect to charge-induced damage, the charge collected in the antenna stresses the oxide of a device. More specifically, in a MOSFET structure, the charge collected on the antenna stresses the gate oxide of the MOSFET, thereby inducing stress-related degradation of the MOSFET. This stress-related degradation may include: shortening the lifetime of the device, increasing the gate leakage of the device, or shifting the threshold voltage of the device.
Advanced technology nodes now require 5 and 6 levels of metallization. This results in multiple wafer exposures to the metal etch reactors. This combined with the decrease in gate oxide thickness to 60A and below make plasma damage a primary concern during metal etch process development. Accordingly, there is a need to better understand the mechanisms of the plasma damage and to develop an approach for minimizing this damage.
Transient fuse structures for detecting plasma damage are disclosed herein. The transient fuse structures are designed to isolate plasma damage occurring at various portion of a process step. The technical advantage of the invention is providing the ability to determine a what portion of a process step (plasma etch) charge-induced damage occurs. With this understanding, appropriate damage suppression techniques can be developed and/or employed.